In today's rapidly advancing semiconductor manufacturing industry, there is a constant drive to reduce feature sizes of the various devices, features and components that combine to form integrated circuits and other semiconductor devices. Examples of features for which reduced feature sizes are desired include contacts and vias, transistor gates, leads of polysilicon and other semiconductor materials, conductive wires and various other device features and components. There is an associated drive to increase integration levels within a chip, i.e. the integrated circuit or other semiconductor device, by integrating a greater number of functional components onto a single chip. There is also a continued drive to increase the substrate size upon which chips are formed. An increased substrate size enables a greater number of chips and components to be formed on a single substrate using a single sequence of processing operations, i.e., at the same time. As the number of individual chips and components formed on a substrate increases, costs are decreased accordingly.
In order to achieve the goals of both decreased feature sizes and increased number of chips and components on larger substrates, it is desirable to maintain uniformity across a substrate.
In many plasma etching operations, however, the physics of the processing chamber often results in overetch operations being more aggressive on the outer portions of the substrate than in the center of the substrate. If the critical dimensions (CD's) of device features are relatively uniform prior to the etching operation, this more aggressive overetching at the edges often results in the features at the outer portions of wafers having diminished CD's and reduced CD's relative to the center of the substrate, i.e. non-uniformity of CD's across the substrate. Previous attempts at correcting this problem include intentionally creating a non-uniformity of CD's after develop and prior to etching. This approach, however, renders the CD data after develop meaningless and makes it difficult to accurately monitor and control the photoresist patterning process.